NAVRACHANA UNIVERSITY

A survey of reconfigurable architectures

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dc.contributor.author Singh, Mahendra Pratap
dc.contributor.author Jain, Manoj Kumar
dc.date.accessioned 2016-03-15T09:24:47Z
dc.date.available 2016-03-15T09:24:47Z
dc.date.issued 2014
dc.identifier.issn 0975 – 8887
dc.identifier.uri http://27.109.7.66:8080/xmlui/handle/123456789/201
dc.description International Journal of Computer Applications (IJCA), ISSN 0975-8887, Volume 98 ,Page 35-40 en_US
dc.description.abstract A new architecture type that is recently evolving is the reconfigurable architecture which combines the benefits of ASIPs (Application Specific Instruction Set Processors) and FPGAs (Field Programmable Gate Arrays). Reconfigurable computing combines software flexibility with high performance hardware. FPGAs are generally employed to construct a reconfigurable block as it provides an instant time-to-market advantage. Reconfigurable devices like FPGA offers improved computational efficiency as compared to traditional processor architectures. Reconfigurable block in these architectures provides the required flexibility for a large variety of embedded applications. Design space exploration of reconfigurable block involves a wide range of alternatives like logic block granularity in FPGA, interconnect topology, etc. The goal of this paper is to explore the reconfigurable architectures. en_US
dc.language.iso en en_US
dc.publisher International Journal of Computer Applications (IJCA) en_US
dc.subject Reconfigurable Architectures en_US
dc.subject FPGA en_US
dc.subject FGRA en_US
dc.subject CGRA en_US
dc.title A survey of reconfigurable architectures en_US
dc.type Article en_US


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