dc.contributor.author |
Singh, Mahendra Pratap |
|
dc.date.accessioned |
2016-03-16T06:47:02Z |
|
dc.date.available |
2016-03-16T06:47:02Z |
|
dc.date.issued |
2015 |
|
dc.identifier.other |
978-1-4799-6272-3/15 |
|
dc.identifier.uri |
http://27.109.7.66:8080/xmlui/handle/123456789/212 |
|
dc.description |
International Conference on pervasive Computing (ICPC), 2015 8-10 Jan. 2015, Page 1 - 4,
DOI: 10.1109/PERVASIVE.2015.7087117 |
en_US |
dc.description.abstract |
Instruction set architecture (ISA) of a processor fills the semantic gap between user and machine. A good ISA for a particular application should be able to address the issues of programmability, implementability, and compatibility. An application specific instruction set processor (ASIP) is a processor designed for a particular application. ISA customization is the process of integrating application specific ISEs (Instruction Set Extensions) into an ASIP’s instruction set architecture. ISA customization pose a major challenge in realizing deigns for application specific processors. This paper is an attempt to investigate contemporary instruction set architectures and to identify issues in ISA customization for application specific instruction set processors. |
en_US |
dc.language.iso |
en |
en_US |
dc.publisher |
IEEE |
en_US |
dc.subject |
AES |
en_US |
dc.subject |
ASIP |
en_US |
dc.subject |
Cryptography |
en_US |
dc.subject |
Customization |
en_US |
dc.subject |
ISE |
en_US |
dc.title |
ISA customization for application specific instruction set processors |
en_US |
dc.type |
Article |
en_US |